View ADS7951SBRGER_9052866.PDF datasheet online --- IC-ON-LINE

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ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 12/10/8-bit, 1 msps, 16/12/8/4-channel, single-ended, micropower, serial interface adcs check for samples: ads7950, ads7951, ads7952, ads7953 , ads7954, ads7955, ads7956, ads7957 , ads7958, ads7959, ads7960, ads7961 1 features description ? 1-mhz sample rate serial devices the ads79xx is a 12/10/8-bit multichannel analog-to-digital converter family. the following table ? product family of 12/10/8-bit resolution shows all twelve devices from this product family. ? zero latency the devices include a capacitor based sar a/d ? 20-mhz serial interface converter with inherent sample and hold. ? analog supply range: 2.7 to 5.25v the devices accept a wide analog supply range from ? i/o supply range: 1.7 to 5.25v 2.7v to 5.25v. very low power consumption makes ? two sw selectable unipolar, input ranges: 0 these devices suitable for battery-powered and to 2.5v and 0 to 5v isolated power supply applications. ? auto and manual modes for channel selection a wide 1.7v to 5.25v i/o supply range facilitates a ? 12,8,4-channel devices can share 16 channel glue-less interface with the most commonly used device footprint cmos digital hosts. ? two programmable alarm levels per channel the serial interface is controlled by cs and sclk for ? four individually configurable gpios for easy connection with microprocessors and dsp. tssop package devices. one gpio for qfn the input signal is sampled with the falling edge of devices cs. it uses sclk for conversion, serial data output, ? typical power dissipation: 14.5 mw (+va = 5v, and reading serial data in. the devices allow auto +vbd = 3v) at 1 msps sequencing of preselected channels or manual selection of a channel for the next conversion cycle. ? power-down current (1 m a) ? input bandwidth (47 mhz at 3db) there are two software selectable input ranges (0v - 2.5v and 0v - 5v), four individually configurable ? 38-,30-pin tssop and 32-,24-pin qfn gpios ( in case of tssop package devices), and packages two programmable alarm thresholds per channel. these features make the devices suitable for most applications data acquisition applications. ? plc / ipc the devices offer an attractive power-down feature. ? battery powered systems this is extremely useful for power saving when the ? medical instrumentation device is operated at lower conversion speeds. ? digital power supplies the 16/12-channel devices from this family are ? touch screen controllers available in a 38-pin tssop and 32 pin qfn ? high-speed data acquisition systems package and the 4/8-channel devices are available in ? high-speed closed-loop systems a 30-pin tssop and 24 pin qfn packages. micropower multi-channel ads79xx family resolution number of channels 12 bit 10 bit 8 bit 16 ads7953 ads7957 ads7961 12 ads7952 ads7956 ads7960 8 ads7951 ads7955 ads7959 4 ads7950 ads7954 ads7958 1 please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. production data information is current as of publication date. copyright ? 2008 ? 2010, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters.
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com this integrated circuit can be damaged by esd. texas instruments recommends that all integrated circuits be handled with appropriate precautions. failure to observe proper handling and installation procedures can cause damage. esd damage can range from subtle performance degradation to complete device failure. precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ads79xx block diagram note: n* is number of channels (16,12,8, or 4) depending on the device from the ads79xx product family. note: 4 number of gpio are available in tssop package devices only, qfn package devices offer only one gpio. 2 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 compare alarm threshold control logic & sequencing sdisclk cs sdo mxo ainp ref adc gpio bdgnd vbd +va agnd ch0ch1 ch2 ch n*
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 ordering information - 12-bit maximum maximum no missing transport package integral differential codes at number of package temperature ordering model media linearity linearity resolution channels designator range information type qty (lsb) (lsb) (bit) ads7953sbdbt tube, 50 38 pin tssop dbt ads7953sbdbtr reel, 2000 ads7953 sb 16 ads7953sbrhbt tube, 250 32 pin qfn rhb ads7953sbrhbr reel, 3000 ads7952sbdbt tube, 50 38 pin tssop dbt ads7952sbdbtr reel, 2000 ads7952 sb 12 ads7952sbrhbt tube, 250 32 pin qfn rhb ads7952sbrhbr reel, 3000 1 1 12 ? 40 c to 125 c ads7951sbdbt tube, 50 30 pin tssop dbt ads7951sbdbtr reel, 2000 ads7951 sb 8 ads7951sbrget tube, 250 24 pin qfn rge ADS7951SBRGER reel, 3000 ads7950sbdbt tube, 50 30 pin tssop dbt ads7950sbdbtr reel, 2000 ads7950 sb 4 ads7950sbrget tube, 250 24 pin qfn rge ads7950sbrger reel, 3000 ads7953sdbt tube, 50 38 pin tssop dbt ads7953sdbtr reel, 2000 ads7953 s 16 ads7953srhbt tube, 250 32 pin qfn rhb ads7953srhbr reel, 3000 ads7952sdbt tube, 50 38 pin tssop dbt ads7952sdbtr reel, 2000 ads7952 s 12 ads7952srhbt tube, 250 32 pin qfn rhb ads7952srhbr reel, 3000 1.5 2 11 ? 40 c to 125 c ads7951sdbt tube, 50 30 pin tssop dbt ads7951sdbtr reel, 2000 ads7951s 8 ads7951srget tube, 250 24 pin qfn rge ads7951srger reel, 3000 ads7950sdbt tube, 50 30 pin tssop dbt ads7950sdbtr reel, 2000 ads7950 s 4 ads7950srget tube, 250 24 pin qfn rge ads7950srger reel, 3000 ordering information - 10-bit maximum maximum no missing number transport package integral differential codes at package temperature ordering model of media linearity linearity resolution designator range information type channels qty (lsb) (lsb) (bit) ads7957sdbt tube, 50 38 pin tssop dbt ads7957sdbtr reel, 2000 ads7957 s 16 ads7957srhbt tube, 250 32 pin qfn rhb ads7957srhbr reel, 3000 ads7956sdbt tube, 50 38 pin tssop dbt ads7956sdbtr reel, 2000 ads7956 s 12 ads7956srhbt tube, 250 32 pin qfn rhb ads7956srhbr reel, 3000 0.5 0.5 10 ? 40 c to 125 c ads7955sdbt tube, 50 30 pin tssop dbt ads7955sdbtr reel, 2000 ads7955 s 8 ads7955srget tube, 250 24 pin qfn rge ads7955srger reel, 3000 ads7954sdbt tube, 50 30 pin tssop dbt ads7954sdbtr reel, 2000 ads7954 s 4 ads7954srget tube, 250 24 pin qfn rge ads7954srger reel, 3000 copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 3 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com ordering information - 8-bit maximum maximum no missing transport package integral differential codes at number of package temperature ordering model media linearity linearity resolution channels designator range information type qty (lsb) (lsb) (bit) ads7961sdbt tube, 50 38 pin tssop dbt ads7961sdbtr reel, 2000 ads7961 s 16 ads7961srhbt tube, 250 32 pin qfn rhb ads7961srhbr reel, 3000 ads7960sdbt tube, 50 38 pin tssop dbt ads7960sdbtr reel, 2000 ads7960 s 12 ads7960srhbt tube, 250 32 pin qfn rhb ads7960srhbr reel, 3000 0.3 0.3 8 ? 40 c to 125 c ads7959sdbt tube, 50 30 pin tssop dbt ads7959sdbtr reel, 2000 ads7959 s 8 ads7959srget tube, 250 24 pin qfn rge ads7959srger reel, 3000 ads7958sdbt tube, 50 30 pin tssop dbt ads7958sdbtr reel, 2000 ads7958 s 4 ads7958srget tube, 250 24 pin qfn rge ads7958srger reel, 3000 absolute maximum ratings (1) value unit ainp or chn to agnd ? 0.3 to +va +0.3 v +va to agnd, +vbd to bdgnd ? 0.3 to +7.0 v digital input voltage to bdgnd ? 0.3 to (7.0) v digital output to bdgnd ? 0.3 to (+va + 0.3) v operating temperature range ? 40 to 125 c storage temperature range ? 65 to 150 c junction temperature (t j max) 150 c power dissipation (t j max ? t a )/ q ja q ja thermal impedance, dbt package 100.6 c/w q ja thermal impedance, rhb package 34 c/w q ja thermal impedance, rge package 38 c/w dbt packaged versions of ads79xx family devices are rated for msl2 260 c per the jstd-020 specifications and the rge and rhb packaged versions of ads79xx family devices are rated for msl3 260c per jstd-020 specifications (1) stresses above those listed under ? absolute maximum ratings ? may cause permanent damage to the device. exposure to absolute maximum conditions for extended periods may affect device reliability. 4 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 electrical characteristics, ads7950/51/52/53 +va = 2.7 v to 5.25 v, +vbd = 1.7 v to 5.25 v, v ref = 2.5 v 0.1 v, t a = -40 c to 125 c, f sample = 1 mhz (unless otherwise noted) parameter test conditions min typ max unit analog input range 1 0 vref full-scale input span (1) v range 2 while 2vref +va 0 2*vref ? 0.20 vref range 1 +0.20 absolute input range v ? 0.20 2*vref range 2 while 2vref +va +0.20 input capacitance 15 r f input leakage current t a = 125 c 61 na system performance resolution 12 bits ads795xsb (2) 12 no missing codes bits ads795xs (2) 11 ads795xsb (2) ? 1 0.5 1 integral linearity lsb (3) ads795xs (2) ? 1.5 0.75 1.5 ads795xsb (2) ? 1 0.5 1 differential linearity lsb ads795xs (2) ? 2 0.75 1.5 offset error (4) ? 3.5 1.1 3.5 lsb range 1 ? 2 0.2 2 gain error lsb range 2 0.2 total unadjusted error (tue) 2 lsb sampling dynamics conversion time 20 mhz sclk 800 nsec acquisition time 325 nsec maximum throughput rate 20 mhz sclk 1.0 mhz aperture delay 5 nsec step response 150 nsec over voltage recovery 150 nsec dynamic characteristics total harmonic distortion (5) 100 khz ? 82 db signal-to-noise ratio 100 khz, ads795xsb (2) 70 71.7 db 100 khz, ads795xs (2) 70 71.7 signal-to-noise + distortion 100 khz, ads795xsb (2) 69 71.3 db 100 khz, ads795xs (2) 68 71.3 spurious free dynamic range 100 khz 84 db small signal bandwidth at ? 3 db 47 mhz any off-channel with 100khz, full-scale input to channel being sampled with dc input (isolation ? 95 crosstalk). channel-to-channel crosstalk db from previously sampled to channel with 100khz, full-scale input to channel being sampled with dc ? 85 input (memory crosstalk). external reference input (1) ideal input span; does not include gain or offset error. (2) ads795x, where x indicates 0, 1, 2, or 3 (3) lsb means least significant bit. (4) measured relative to an ideal full-scale input (5) calculated on the first nine harmonics of the input frequency. copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 5 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com electrical characteristics, ads7950/51/52/53 (continued) +va = 2.7 v to 5.25 v, +vbd = 1.7 v to 5.25 v, v ref = 2.5 v 0.1 v, t a = -40 c to 125 c, f sample = 1 mhz (unless otherwise noted) parameter test conditions min typ max unit v ref reference voltage at refp (6) 2.0 2.5 3.0 v reference resistance 100 k ? alarm setting higher threshold range 0 ffc hex lower threshold range 0 ffc hex digital input/output logic family cmos v ih 0.7*(+vbd) v il +vbd = 5 v 0.8 logic level v il +vbd = 3 v 0.4 v v oh at i source = 200 m a vdd-0.2 v ol at i sink = 200 m a 0.4 data format msb first msb first power supply requirements +va supply voltage 2.7 3.3 5.25 v +vbd supply voltage 1.7 3.3 5.25 v at +va = 2.7 to 3.6 v and 1mhz throughput 1.8 ma at +va = 2.7 to 3.6 v static state 1.05 ma supply current (normal mode) at +va = 4.7 to 5.25 v and 1 mhz throughput 2.3 3 ma at +va = 4.7 to 5.25 v static state 1.1 1.5 ma power-down state supply current 1 m a +vbd supply current +va = 5.25v, f s = 1mhz 1 ma power-up time 1 m sec invalid conversions after power up or 1 number reset s temperature range specified performance ? 40 125 c (6) device is designed to operate over v ref = 2.0 v to 3.0 v. however one can expect lower noise performance at v ref < 2.4 v. this is due to snr degradation resulting from lowered signal range. electrical characteristics, ads7954/55/56/57 +va = 2.7 v to 5.25 v, +vbd = 1.7 v to 5.25 v, v ref = 2.5 v 0.1 v, t a = -40 c to 125 c, f sample = 1 mhz (unless otherwise noted) parameter test conditions min typ max unit analog input range 1 0 vref full-scale input span (1) v range 2 while 2vref +va 0 2*vref vref range 1 ? 0.20 +0.20 absolute input range v 2*vref range 2 while 2vref +va ? 0.20 +0.20 input capacitance 15 r f input leakage current t a = 125 c 61 na system performance resolution 10 bits no missing codes 10 bits (1) ideal input span; does not include gain or offset error. 6 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 electrical characteristics, ads7954/55/56/57 (continued) +va = 2.7 v to 5.25 v, +vbd = 1.7 v to 5.25 v, v ref = 2.5 v 0.1 v, t a = -40 c to 125 c, f sample = 1 mhz (unless otherwise noted) parameter test conditions min typ max unit integral linearity ? 0.5 0.2 0.5 lsb (2) differential linearity ? 0.5 0.2 0.5 lsb offset error (3) ? 1.5 0.5 1.5 lsb range 1 ? 1 0.1 1 gain error lsb range 2 0.1 sampling dynamics conversion time 20 mhz sclk 800 nsec acquisition time 325 nsec maximum throughput rate 20 mhz sclk 1.0 mhz aperture delay 5 nsec step response 150 nsec over voltage recovery 150 nsec dynamic characteristics total harmonic distortion (4) 100 khz ? 80 db signal-to-noise ratio 100 khz 60 db signal-to-noise + distortion 100 khz 60 spurious free dynamic range 100 khz 82 db full power bandwidth at ? 3 db 47 mhz any off-channel with 100khz, full-scale input to ? 95 channel being sampled with dc input. channel-to-channel crosstalk db from previously sampled to channel with 100khz, ? 85 full-scale input to channel being sampled with dc input. external reference input v ref reference voltage at refp 2.0 2.5 3.0 v reference resistance 100 k ? alarm setting higher threshold range 000 ffc hex lower threshold range 000 ffc hex digital input/output logic family cmos v ih 0.7*(+vbd) v il +vbd = 5 v 0.8 logic level v il +vbd = 3 v 0.4 v v oh at i source = 200 m a vdd-0.2 v ol at i sink = 200 m a 0.4 data format msb first msb first power supply requirements +va supply voltage 2.7 3.3 5.25 v +vbd supply voltage 1.7 3.3 5.25 v at +va = 2.7 to 3.6 v and 1mhz throughput 1.8 ma at +va = 2.7 to 3.6 v static state 1.05 1 ma supply current (normal mode) at +va = 4.7 to 5.25 v and 1 mhz throughput 2.3 3 ma at +va = 4.7 to 5.25 v static state 1.1 1.5 ma (2) lsb means least significant bit. (3) measured relative to an ideal full-scale input (4) calculated on the first nine harmonics of the input frequency. copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 7 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com electrical characteristics, ads7954/55/56/57 (continued) +va = 2.7 v to 5.25 v, +vbd = 1.7 v to 5.25 v, v ref = 2.5 v 0.1 v, t a = -40 c to 125 c, f sample = 1 mhz (unless otherwise noted) parameter test conditions min typ max unit power-down state supply current 1 m a +vbd supply current +va = 5.25v, f s = 1mhz 1 ma power-up time 1 m sec invalid conversions after power up or 1 numbers reset temperature range specified performance ? 40 125 c electrical characteristics, ads7958/59/60/61 +va = 2.7 v to 5.25 v, +vbd = 1.7 v to 5.25 v, v ref = 2.5 v 0.1 v, t a = -40 c to 125 c, f sample = 1 mhz (unless otherwise noted) parameter test conditions min typ max unit analog input range 1 0 vref full-scale input span (1) v range 2 while 2vref +va 0 2*vref vref range 1 ? 0.20 +0.20 absolute input range v 2*vref range 2 while 2vref +va ? 0.20 +0.20 input capacitance 15 r f input leakage current t a = 125 c 61 na system performance resolution 8 bits no missing codes 8 bits integral linearity ? 0.3 0.1 0.3 lsb (2) differential linearity ? 0.3 0.1 0.3 lsb offset error (3) ? 0.5 0.2 0.5 lsb range 1 ? 0.6 0.1 0.6 gain error lsb range 2 0.1 sampling dynamics conversion time 20 mhz sclk 800 nsec acquisition time 325 nsec maximum throughput rate 20 mhz sclk 1.0 mhz aperture delay 5 nsec step response 150 nsec over voltage recovery 150 nsec dynamic characteristics total harmonic distortion (4) 100 khz ? 75 db signal-to-noise ratio 100 khz 49 db signal-to-noise + distortion 100 khz 49 spurious free dynamic range 100 khz ? 78 db full power bandwidth at ? 3 db 47 mhz (1) ideal input span; does not include gain or offset error. (2) lsb means least significant bit. (3) measured relative to an ideal full-scale input (4) calculated on the first nine harmonics of the input frequency. 8 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 electrical characteristics, ads7958/59/60/61 (continued) +va = 2.7 v to 5.25 v, +vbd = 1.7 v to 5.25 v, v ref = 2.5 v 0.1 v, t a = -40 c to 125 c, f sample = 1 mhz (unless otherwise noted) parameter test conditions min typ max unit any off-channel with 100khz, full-scale input to ? 95 channel being sampled with dc input. channel-to-channel crosstalk db from previously sampled to channel with 100khz, full-scale input to channel being sampled with dc ? 85 input. eternal reference input vref reference voltage at refp 2.0 2.5 3.0 v reference resistance 100 k ? alarm setting higher threshold range 000 ff hex lower threshold range 000 ff hex digital input/output logic family cmos v ih 0.7*(+vbd) v il +vbd = 5 v 0.8 logic level v il +vbd = 3 v 0.4 v v oh at i source = 200 m a vdd-0.2 v ol at i sink = 200 m a 0.4 data format msb first power supply requirements +va supply voltage 2.7 3.3 5.25 v +vbd supply voltage 1.7 3.3 5.25 v at +va = 2.7 to 3.6 v and 1mhz throughput 1.8 ma at +va = 2.7 to 3.6 v static state 1.05 ma supply current (normal mode) at +va = 4.7 to 5.25 v and 1 mhz throughput 2.3 3 ma at +va = 4.7 to 5.25 v static state 1.1 1.5 ma power-down state supply current 1 m a +vbd supply current +va = 5.25v, f s = 1mhz 1 ma power-up time 1 m sec invalid conversions after power up or 1 numbers reset temperature range specified performance ? 40 125 c timing requirements (see figure 45 , figure 46 , figure 47 , and figure 48 ) all specifications typical at ? 40 c to 125 c, +va = 2.7 v to 5.25 v (unless otherwise specified) parameter test conditions (1) (2) min typ max unit +vbd = 1.8 v 16 t conv conversion time +vbd = 3 v 16 sclk +vbd = 5 v 16 +vbd = 1.8 v 40 minimum quiet sampling time needed from bus t q +vbd = 3 v 40 ns 3-state to start of next conversion +vbd = 5 v 40 (1) 1.8v specifications apply from 1.7v to 1.9v, 3v specifications apply from 2.7v to 3.6v, 5v specifications apply from 4.75v to 5.25v. (2) with 50-pf load copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 9 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com timing requirements (see figure 45 , figure 46 , figure 47 , and figure 48 ) (continued) all specifications typical at ? 40 c to 125 c, +va = 2.7 v to 5.25 v (unless otherwise specified) parameter test conditions (1) (2) min typ max unit +vbd = 1.8 v 38 t d1 delay time, cs low to first data (do ? 15) out +vbd = 3 v 27 ns +vbd = 5 v 17 +vbd = 1.8 v 8 t su1 setup time, cs low to first rising edge of sclk +vbd = 3 v 6 ns +vbd = 5 v 4 +vbd = 1.8 v 35 t d2 delay time, sclk falling to sdo next data bit valid +vbd = 3 v 27 ns +vbd = 5 v 17 +vbd = 1.8 v 7 t h1 hold time, sclk falling to sdo data bit valid +vbd = 3 v 5 ns +vbd = 5 v 3 +vbd = 1.8 v 26 t d3 delay time, 16 th sclk falling edge to sdo 3-state +vbd = 3 v 22 ns +vbd = 5 v 13 +vbd = 1.8 v 2 t su2 setup time, sdi valid to rising edge of sclk +vbd = 3 v 3 ns +vbd = 5 v 4 +vbd = 1.8 v 12 t h2 hold time, rising edge of sclk to sdi valid +vbd = 3 v 10 ns +vbd = 5 v 6 +vbd = 1.8 v 20 t w1 pulse duration cs high +vbd = 3 v 20 ns +vbd = 5 v 20 +vbd = 1.8 v 24 t d4 delay time cs high to sdo 3-state +vbd = 3 v 21 ns +vbd = 5 v 12 +vbd = 1.8 v 20 t wh pulse duration sclk high +vbd = 3 v 20 ns +vbd = 5 v 20 +vbd = 1.8 v 20 t wl pulse duration sclk low +vbd = 3 v 20 ns +vbd = 5 v 20 +vbd = 1.8 v 20 frequency sclk +vbd = 3 v 20 mhz +vbd = 5 v 20 10 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 device information pin configuration (top view) copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 11 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 1 30 2 3 4 5 6 7 8 9 10 11 12 13 14 15 29 28 27 26 25 24 23 22 21 20 19 18 17 16 ads7950ads7954 ads7958 gpio2gpio3 refm refp +va agnd mxo ainp ainm agnd nc ch3 nc ch2 nc gpio1gpio0 +vbd bdgnd sdo sdi sclk cs agnd +va ch0 nc ch1 nc nc 1 30 2 3 4 5 6 7 8 9 10 11 12 13 14 15 29 28 27 26 25 24 23 22 21 20 19 18 17 16 ads7951ads7955 ads7959 gpio2gpio3 refm refp +va agnd mxo ainp ainm agnd ch7ch6 ch5 ch4 nc gpio1gpio0 +vbd bdgnd sdo sdi sclk cs agnd +va ch0 ch1 ch2 ch3 nc 1 38 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 ads7952ads7956 ads7960 gpio2gpio3 refm refp +va agnd mxo ainp ainm agnd ncnc nc nc ch11 ch10 ch9ch8 agnd gpio1gpio0 +vbd bdgnd sdo sdi sclk cs agnd +va ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 agnd 1 38 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 ads7953ads7957 ads7961 gpio2gpio3 refm refp +va agnd mxo ainp ainm agnd ch15ch14 ch13 ch12 ch11 ch10 ch9ch8 agnd gpio1gpio0 +vbd bdgnd sdo sdi sclk cs agnd +va ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 agnd 1 8 9 16 32 25 24 17 agnd ainm ainp mxo ch15ch12 ch13 ch14 sclk +va agnd cs ch0ch3 ch2 ch1 ch11 ch10 ch9 ch8 ch7 ch6 ch5 ch4 +va refp refm gpio +vbd bdgnd sdo sdi ads7953/ ads7957/ ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com terminal functions - tssop packages device name ads7953 ads7952 ads7951 ads7950 ads7957 ads7956 ads7955 ads7954 pin name i/o function ads7961 ads7960 ads7959 ads7958 pin no. reference 4 4 4 4 refp i reference input 3 3 3 3 refm i reference ground 12 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 1 7 24 18 +va ainp mxo agnd ainm ch7 sdi agnd cs sclk +va ch0 ch6 ch5 ch4 ch3 ch2 ch1 refp refm gpio +vbd bdgnd sdo ads7951/ ads7955/ ads7959 6 13 19 12 1 8 9 16 32 25 24 17 agnd ainm ainp mxo nc ch10 ch11 nc sclk +va agnd cs ncch1 ch0 nc ch9 ch8 ch7 ch6 ch5 ch4 ch3 ch2 +va refp refm gpio +vbd bdgnd sdo sdi ads7952/ ads7956/ ads7960 1 7 24 18 +va ainp mxo agnd ainm nc sdi agnd cs sclk +va nc nc ch3 ch2 ch1 ch0 nc refp refm gpio +vbd bdgnd sdo ads7950/ ads7954/ ads7958 6 13 19 12
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 terminal functions - tssop packages (continued) device name ads7953 ads7952 ads7951 ads7950 ads7957 ads7956 ads7955 ads7954 pin name i/o function ads7961 ads7960 ads7959 ads7958 pin no. adc analog input 8 8 8 8 ainp i signal input to adc 9 9 9 9 ainm i adc input ground multiplexer 7 7 7 7 mxo o multiplexer output 28 28 20 20 ch0 i analog channels for multiplexer 27 27 19 18 ch1 i 26 26 18 14 ch2 i 25 25 17 12 ch3 i 24 24 14 - ch4 i 23 23 13 - ch5 i 22 22 12 - ch6 i 21 21 11 - ch7 i 18 18 - - ch8 i 17 17 - - ch9 i 16 16 - - ch10 i 15 15 - - ch11 i 14 - - - ch12 i 13 - - - ch13 i 12 - - - ch14 i 11 - - - ch15 i digital control signals 31 31 23 23 cs i chip select input 32 32 24 24 sclk i serial clock input 33 33 25 25 sdi i serial data input 34 34 26 26 sdo o serial data output general purpose inputs / outputs: these pins have programmable dual functionality. refer to table 8 for functionality programming 37 37 29 29 gpio0 i/o general purpose input or output high alarm or o active high output indicating high alarm or high/low high/low alarm depending on programming alarm 38 38 30 30 gpio1 i/o general purpose input or output low alarm o active high output indicating low alarm 1 1 1 1 gpio2 i/o general purpose input or output range i selects range: high - > range 2 / low - > range 1 2 2 2 2 gpio3 i/o general purpose input or output pd i active low power down input power supply and ground 5, 29 5, 29 5, 21 5, 21 +va ? analog power supply 6, 10, 19, 6, 10, 19, 6, 10, 22 6, 10, 22 agnd ? analog ground 20, 30 20, 30 36 36 28 28 +vbd ? digital i/o supply 35 35 27 27 bdgnd ? digital ground nc pins copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 13 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com terminal functions - tssop packages (continued) device name ads7953 ads7952 ads7951 ads7950 ads7957 ads7956 ads7955 ads7954 pin name i/o function ads7961 ads7960 ads7959 ads7958 pin no. ? 11, 12, 13, 15, 16 11, 13, 15, ? ? pins internally not connected, do not float these pins 14 16, 17, 19 terminal functions - qfn packages device name ads7953 ads7952 ads7951 ads7950 ads7957 ads7956 ads7955 ads7954 pin name i/o function ads7961 ads7960 ads7959 ads7958 pin no. reference 31 31 24 24 refp i reference input 30 30 23 23 refm i reference ground adc analog input 3 3 4 4 ainp i signal input to adc 4 4 5 5 ainm i adc input ground multiplexer 2 2 3 3 mxo o multiplexer output 20 18 13 11 ch0 i analog-input channels for multiplexer 19 17 12 10 ch1 i 18 16 11 9 ch2 i 17 15 10 8 ch3 i 16 14 9 - ch4 i 15 13 8 - ch5 i 14 12 7 - ch6 i 13 11 6 - ch7 i 12 10 - - ch8 i 11 9 - - ch9 i 10 8 - - ch10 i 9 7 - - ch11 i 8 - - - ch12 i 7 - - - ch13 i 6 - - - ch14 i 5 - - - ch15 i digital control signals 23 23 16 16 cs i chip select input 24 24 17 17 sclk i serial clock input 25 25 18 18 sdi i serial data input 26 26 19 19 sdo o serial data output general purpose input / output: this pin has programmable dual functionality. refer to table 8 for functionality programming 29 29 22 22 gpio0 i/o general purpose input or output high alarm or o active high output indicating high alarm or high/low high/low alarm depending on programming alarm power supply and ground 21, 32 21, 32 1, 14 1, 14 +va ? analog power supply 14 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 terminal functions - qfn packages (continued) device name ads7953 ads7952 ads7951 ads7950 ads7957 ads7956 ads7955 ads7954 pin name i/o function ads7961 ads7960 ads7959 ads7958 pin no. 1, 22 1, 22 2, 15 2, 15 agnd ? analog ground 28 28 21 21 +vbd ? digital i/o supply 27 27 20 20 bdgnd ? digital ground nc pins ? 5, 6, 19, ? 6, 7, 12, 13 ? ? pins internally not connected, do not float these pins 20 copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 15 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com typical charateristics (all ads79xx family devices) supply current static supply current supply current vs vs vs supply voltage supply voltage free-air temperature figure 1. figure 2. figure 3. static supply current supply current supply current vs vs vs free-air temperature sample rate sample rate figure 4. figure 5. figure 6. 16 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 0.9 1 1.1 1.2 1.3 1.4 1.5 2.7 3.4 4.1 4.8 5.5 +va - supply current - ma +va - supply voltage - v t = 25c a 0 0.5 1 1.5 2 2.5 0 100 200 300 400 500 with powerdown, t = 25c a 5 v 2.7 v +va - supply current - ma f - sample rate - ksps s 0 0.5 1 1.5 2 2.5 0 200 400 600 800 1000 f - sample rate - ksps s 5 v 2.7 v no powerdown, t = 25c a +va - supply current - ma 1.07 1.075 1.08 1.085 1.09 1.095 1.1 1.105 1.11 1.115 -40 15 70 125 t - free-air temperature - c a +va - supply current - ma v = 5.5 v dd 2 2.2 2.4 2.6 2.8 3 3.2 3.4 -40 15 70 125 t - free-air temperature - c a +va - supply current - ma f = 1 msps, v = 5.5 v s dd 1 1.5 2 2.5 3 3.5 2.7 3.4 4.1 4.8 5.5 +va - supply voltage - v +va - supply current - ma f = 1 msps, t = 25c s a
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 typical characteristics (12-bit devices only) variations for 10-bit and 8-bit devices are too small to be illustrated through the characteristic curves differential nonlinearity integral nonlinearity differential nonlinearity vs vs vs supply voltage supply voltage free-air temperature figure 7. figure 8. figure 9. integral nonlinearity offset error offset error vs vs vs free-air temperature supply voltage interface supply voltage figure 10. figure 11. figure 12. gain error gain error offset error vs vs vs supply voltage interface supply voltage free-air temperature figure 13. figure 14. figure 15. copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 17 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 2.7 3.4 4.1 4.8 5.5 gain error - lsbs +va - supply voltage - v +vbd = 1.8 v, f = 1 msps, t = 25c s a 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -40 15 70 125 t - free-air temperature - c a offset error - lsbs +va = 5.5 v, +vbd = 1.8 v, f = 1 msps s -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 2.7 3.2 3.7 4.2 4.7 5.2 dnl - differential nonlinearity - lsbs dnl max dnl min 5.5 +va - supply voltage - v f = 1 msps, t = 25c s a -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 2.7 3.2 3.7 4.2 4.7 5.2 inl - integral nonlinearity - lsbs inl max inl min +va - supply voltage - v f = 1 msps, t = 25c s a -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 -40 15 70 125 dnl max dnl min t - free-air temperature - c a dnl - differential nonlinearity - lsbs +va = 5 v, +vbd = 5 v, f = 1 msps s -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 -40 15 70 125 inl max inl min +va = 5 v, +vbd = 5 v, f = 1 msps s inl - integral nonlinearity - lsbs t - free-air temperature - c a 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.7 3.4 4.1 4.8 5.5 offset error - lsbs +va - supply voltage - v +vbd = 1.8 v, f = 1 msps, t = 25c s a 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 1.8 2.3 2.8 3.3 3.8 4.3 4.8 5.5 +vbd - interace supply - v offset error - lsbs +va = 5.5 v, f = 1 msps, t = 25c s a 5.3 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 1.8 2.3 2.8 3.3 3.8 4.3 4.8 5.3 5.5 +vbd - interace supply - v gain error - lsbs +va = 5.5 v, f = 1 msps, t = 25c s a
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com typical characteristics (12-bit devices only) (continued) variations for 10-bit and 8-bit devices are too small to be illustrated through the characteristic curves gain error signal-to-noise ratio signal-to-noise + distortion vs vs vs free-air temperature supply voltage supply voltage figure 16. figure 17. figure 18. total harmonic distortion spurious free dynamic range signal-to-noise ratio vs vs vs supply voltage supply voltage free-air temperature figure 19. figure 20. figure 21. signal-to-noise + distortion total harmonic distortion spurious free dynamic range vs vs vs free-air temperature free-air temperature free-air temperature figure 22. figure 23. figure 24. 18 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 -40 15 70 125 +va = 5.5 v, +vbd = 1.8 v, f = 1 msps s gain error - lsbs t - free-air temperature - c a 69 69.5 70 70.5 71 71.5 72 2.7 3.4 4.1 4.8 5.5 snr - signal-to-noise ratio - db +va - supply voltage - v +vbd = 3 v, f = 1 msps, f = 100 khz t = 25c s in a 69 69.5 70 70.5 71 71.5 72 2.7 3.4 4.1 4.8 5.5 sinad - signal-to-noise and distortion - db +va - supply voltage - v +vbd = 3 v, f = 1 msps, f = 100 khz t = 25c s in a -90 -89 -88 -87 -86 -85 -84 -83 -82 -81 -80 2.7 3.4 4.1 4.8 5.5 thd - total harmonic distortion - +va - supply voltage - v +vbd = 3 v, f = 1 msps, f = 100 khz t = 25c s in a 80 81 82 83 84 85 86 87 88 89 90 2.7 3.4 4.1 4.8 5.5 sfdr - spurious free dynamic range - db +va - supply voltage - v +vbd = 3 v, f = 1 msps, f = 100 khz t = 25c s in a 69 69.5 70 70.5 71 71.5 72 -40 15 70 125 snr - signal-to-noise ratio - db t - free-air temperature - c a +va = 5 v +vbd = 3 v, f = 1 msps, f = 100 khz s in 69 69.5 70 70.5 71 71.5 72 -40 15 70 125 sinad - signal-to-noise and distortion - db t - free-air temperature - c a +va = 5 v +vbd = 3 v, f = 1 msps, f = 100 khz s in -90 -89 -88 -87 -86 -85 -84 -83 -82 -81 -80 -40 15 70 125 thd - total harmonic distortion - db t - free-air temperature - c a +va = 5 v +vbd = 3 v, f = 1 msps, f = 100 khz s in 80 81 82 83 84 85 86 87 88 89 90 -40 15 70 125 sfdr - spurious free dynamic range - db t - free-air temperature - c a +va = 5 v +vbd = 3 v, f = 1 msps, f = 100 khz s in
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 typical characteristics (12-bit devices only) (continued) variations for 10-bit and 8-bit devices are too small to be illustrated through the characteristic curves signal-to-noise ratio signal-to-noise + distortion total harmonic distortion vs vs vs input frequency input frequency input frequency figure 25. figure 26. figure 27. signal-to-noise + distortion total harmonic distortion vs vs spurious free dynamic range input frequency input frequency vs (across different source resistance (across different source resistance input frequency values) values) figure 28. figure 29. figure 30. copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 19 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 69 69.5 70 70.5 71 71.5 72 72.5 73 10 30 50 70 90 110 130 150 f - input frequency - khz in snr - signal-to-noise ratio - db +va = 5 v +vbd = 3 v, f = 1 msps, t = 25c, mxo shorted to ainp s a 69 69.5 70 70.5 71 71.5 72 72.5 73 10 30 50 70 90 110 130 150 f - input frequency - khz in sinad - signal-to-noise and distortion - db +va = 5 v +vbd = 3 v, f = 1 msps, t = 25c, mxo shorted to ainp s a -90 -88 -86 -84 -82 -80 -78 -76 -74 -72 -70 10 30 50 70 90 110 130 150 f - input frequency - khz in thd - total harmonic distortion - db +va = 5 v +vbd = 3 v, f = 1 msps, t = 25c, mxo shorted to ainp s a 70 75 80 85 90 95 100 10 30 50 70 90 110 130 150 f - input frequency - khz in sfdr - spurious free dynamic range - db +va = 5 v +vbd = 3 v, f = 1 msps, t = 25c, mxo shorted to ainp s a 69 69.5 70 70.5 71 71.5 72 20 40 60 80 100 10 w f - input frequency - khz in sinad - signal-to-noise and distortion - db 100 w 500 w 1000 w +va = 5 v +vbd = 5 v, f = 1 msps, t = 25c, buffer between mxo and ainp s a -90 -88 -86 -84 -82 -80 -78 -76 -74 -72 -70 20 40 60 80 100 10 w 100 w 500 w 1000 w thd - total harmonic distortion - db f - input frequency - khz in +va = 5 v +vbd = 5 v, f = 1 msps, t = 25c, buffer between mxo and ainp s a
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com typical characteristics (12-bit devices only) (continued) variations for 10-bit and 8-bit devices are too small to be illustrated through the characteristic curves spurious free dynamic range vs input frequency (across different source resistance differential nonlinearity integral nonlinearity variation values) variation across channels across channels figure 31. figure 32. figure 33. offset error variation across gain error variation across signal-to-noise ratio variation channels channels across channels figure 34. figure 35. figure 36. 20 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 0 0.05 0.1 0.15 0.2 0.25 0 5 10 15 20 e - gain error - lsbs g channel number +va = 5 v, +vbd = 5 v, f = 1 msps s -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 0 5 10 15 channel number dnl max dnl min dnl - differential nonlinearity - lsbs +va = 5 v, +vbd = 5 v, f = 1 msps s -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 0 5 10 15 channel number inl - integral nonlinearity - lsbs inl max inl min +va = 5 v, +vbd = 5 v, f = 1 msps s 70 72 74 76 78 80 82 84 86 88 90 20 40 60 80 100 sfdr - spurious free dynamic range - db f - input frequency - khz in 10 w 1000 w +va = 5 v +vbd = 5 v, f = 1 msps, t = 25c, buffer between mxo and ainp s a 100 w 500 w 70 70.5 71 71.5 72 72.5 73 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 channel number snr - signal-to-noise ratio - db +va = 5 v, +vbd = 5 v, f = 1 msps s 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0 5 10 15 20 e - offset error - lsbs o channel number +va = 5 v, +vbd = 5 v, f = 1 msps s
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 typical characteristics (12-bit devices only) (continued) variations for 10-bit and 8-bit devices are too small to be illustrated through the characteristic curves crosstalk input leakage current signal-to-noise + distortion vs vs variation across channels input frequency free-air temperature figure 37. figure 38. figure 39. total unadjusted error (tue max) total unadjusted error (tue min) figure 40. figure 41. copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 21 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 70 70.5 71 71.5 72 72.5 73 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 channel number sinad - signal-to-noise and distortion - db +va = 5 v, +vbd = 5 v, f = 1 msps s 0 20 40 60 80 100 120 0 50 100 150 200 250 crosstalk - db memory isolation f - input frequency - khz in +va = 5 v, +vbd = 5 v, f = 1 msps, ch0, ch1 s 0 10 20 30 40 50 60 70 80 90 100 -40 -25 -10 5 20 35 50 65 80 95 110 125 ainp - leakage current - na v = 1.25 v i t - free-air temperature - c a v = 2.5 v i v = 0 v i +va = 5 v, +vbd = 5 v 0 5 10 15 20 25 0.25 0.5 0.75 1 1.25 1.5 1.75 2 tue max - lsb number of devices 0 5 10 15 20 25 -1.75 -1.5 -1.25 -1 -0.75 -0.5 -0.25 0 0.25 0.5 0.75 1 tue min- lsb number of devices
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com typical characteristics (12-bit devices only) figure 42. figure 43. figure 44. 22 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 0 1024 2048 3072 4096 code dnl - lsbs dnl +va = 5 v +vbd = 5 v, f = 1 msps, t = 25c s a -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 0 1024 2048 3072 4096 code inl - lsbs inl +va = 5 v, +vbd = 5 v, f = 1 msps s fft -160 -140 -120 -100 -80 -60 -40 -20 0 0 100000 200000 300000 400000 500000 f - frequency - hz amplitude - db +va = 5 v +vbd = 5 v, f = 1 msps, f = 100 khz npoints = 16384 s in
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 detailed description device operation the ads7950 to ads7961 are 12/10/8-bit multichannel devices. figure 45 , figure 46 , figure 47 , and figure 48 show device operation timing. device operation is controlled with cs, sclk, and sdi. the device outputs its data on sdo. figure 45. device operation timing diagram each frame begins with the falling edge of cs. with the falling edge of cs, the input signal from the selected channel is sampled, and the conversion process is initiated. the device outputs data while the conversion is in progress. the 16-bit data word contains a 4-bit channel address, followed by a 12-bit conversion result in msb first format. there is an option to read the gpio status instead of the channel address. (refer to table 1 , table 2 , and table 5 for more details.) the device selects a new multiplexer channel on the second sclk falling edge. the acquisition phase starts on the fourteenth sclk rising edge. on the next cs falling edge the acquisition phase will end, and the device starts a new frame. the tssop packaged device has four general purpose io (gpio) pins, qfn versions have only one gpio. these four pins can be individually programmed as gpo or gpi. it is also possible to use them for preassigned functions, refer to table 10 . gpo data can be written into the device through the sdi line. the device refreshes the gpo data on the cs falling edge as per the sdi data written in previous frame. similarly the device latches gpi status on the cs falling edge and outputs the gpi data on the sdo line (if gpi read is enabled by writing di04=1 in the previous frame) in the same frame starting with the cs falling edge. copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 23 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 1 3 5 7 9 11 13 15 16 3 5 7 9 11 13 15 16 1 12 bit conversion result 16 bit i/p word 16 bit i/p word 12 bit conversion result sampling instance mux chan change analog i/ cs sclk sdo sdi mux acquisition conversion conversion phase conversion phase gpogpi mux chan change frame n frame n+1 data written (thr sdi) in frame n data written (thr sdi) in frame n-1 gpi status is latched in on cs falling edge and transferred to sdo frame n tacq tcnv top 4 bit top 4 bit p settling after chan change acquisition phase
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com figure 46. serial interface timing diagram for 12-bit devices ( ads7950/51/52/53) figure 47. serial interface timing diagram for 10-bit devices (ads7954/55/56/57) figure 48. serial interface timing diagram for 8-bit devices (ads7958/59/60/61) the falling edge of cs clocks out do-15 (first bit of the four bit channel address), and remaining address bits are clocked out on every falling edge of sclk until the third falling edge. the conversion result msb is clocked out on the 4th sclk falling edge and lsb on the 15th/13th/11th falling edge respectively for 12/10/8-bit devices. on the 16th falling edge of sclk, sdo goes to the 3-state condition. the conversion ends on the 16th falling edge of sclk. the device reads a sixteen bit word on the sdi pin while it outputs the data on the sdo pin. sdi data is latched on every rising edge of sclk starting with the 1st clock as shown in figure 46 , figure 47 , and figure 48 . cs can be asserted (pulled high) only after 16 clocks have elapsed. 24 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 1 2 3 4 5 6 14 15 16 cs\ sclk sdo sdi do- 15 do- 14 do- 13 do- 12 do-11 msb do-10 msb-1 do-0 - do-1 - do-2 lsb di-15 di-14 di-13 di-12 di-11 di-10 di-2 di-1 di-0 a tsu1 td1 td2 th1 tsu2 th2 td3 tw1 tq 1/t throughput (single frame) cs 1 2 3 4 5 6 12 13 16 cs\ sclk sdo sdi do- 15 do- 14 do- 13 do- 12 do-11 msb do-10 msb-1 do-0 - do-3 - do-4 lsb di-15 di-14 di-13 di-12 di-11 di-10 di-4 di-3 di-0 a tsu1 td1 td2 th1 tsu2 th2 td3 tw1 tq 1/t throughput (single frame) cs th 2 1 2 3 4 5 6 14 15 16 cs sclk sdo sdi do- 15 do- 14 do- 13 do- 12 do-11 msb do-10 msb-1 do-0 lsb do-1 lsb+1 do-2 lsb+2 di-15 di-14 di-12 di-11 di-10 di-2 di-1 di-0 a tsu 1 td 1 td 2 th 1 tsu2 td 3 tw 1 tq 1 /t throughput (single frame) di-13
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 the device has two (high and low) programmable alarm thresholds per channel. if the input crosses these limits; the device flags out an alarm on gpio0/gpio1 depending on the gpio program register settings (refer to table 10 ). the alarm is asserted (under the alarm conditions) on the 12th falling edge of sclk in the same frame when a data conversion is in progress. the alarm output is reset on the 10th falling edge of sclk in the next frame. the device offers a power-down feature to save power when not in use. there are two ways to powerdown the device. it can be powered down by writing di05 = 1 in the mode control register (refer to table 1 , table 2 , and table 5 ); in this case the device powers down on the 16th falling edge of sclk in the next data frame. another way to powerdown the device is through gpio in the case of the tssop packaged devices . gpio3 can act as the pd input (refer to table 10 , to assign this functionality to gpio3). this is an asynchronous and active low input. the device powers down instantaneously after gpio3 ( pd) = 0. the device will power up again on the cs falling edge with di05 = 0 in the mode control register and gpio3 ( pd) = 1. channel sequencing modes there are three modes for channel sequencing, namely manual mode , auto-1 mode , auto-2 mode . mode selection is done by writing into the control register (refer to table 1 , table 2 , and table 5 ). a new multiplexer channel is selected on the second falling edge of sclk (as shown in figure 45 ) in all three modes. manual mode: when configured to operate in manual mode, the next channel to be selected is programmed in each frame and the device selects the programmed channel in the next frame. on powerup or after reset the default channel is 'channel-0' and the device is in manual mode. auto-1 mode: in this mode the device scans pre-programmed channels in ascending order. a new multiplexer channel is selected every frame on the second falling edge of sclk. there is a separate ? program register ? for pre-programming the channel sequence. table 3 and table 4 show auto-1 ? program register ? settings. once programmed the device retains ? program register ? settings until the device is powered down, reset, or reprogrammed. it is allowed to exit and re-enter the auto-1 mode any number of times without disturbing ? program register ? settings. the auto-1 program register is reset to ffff/fff/ff/f hex for the 16/12/8/4 channel devices respectively upon device powerup or reset; implying the device scans all channels in ascending order. auto-2 mode: in this mode the user can configure the program register to select the last channel in the scan sequence. the device scans all channels from channel 0 up to and including the last channel in ascending order. the multiplexer channel is selected every frame on the second falling edge of sclk. there is a separate ? program register ? for pre-programming of the last channel in the sequence (multiplexer depth). table 6 lists the ? auto-2 prog ? register settings for selection of the last channel in the sequence. once programmed the device retains program register settings until the device is powered down, reset, or reprogrammed. it is allowed to exit and re-enter auto-2 mode any number of times, without disturbing the ? program register ? settings. on powerup or reset the bits d9-d6 of the auto-2 program register are reset to f/b/7/3 hex for the 16/12/8/4 channel devices respectively; implying the device scans all channels in ascending order. device programming and mode control the following section describes device programming and mode control. these devices feature two types of registers to configure and operate the devices in different modes. these registers are referred as ? configuration registers ? . there are two types of ? configuration registers ? namely ? mode control registers ? and ? program registers ? . mode control register a ? mode control register ? is configured to operate the device in one of three channel sequencing modes, namely manual mode, auto-1 mode, auto-2 mode. it is also used to control user programmable features like range selection, device power-down control, gpio read control, and writing output data into the gpio. copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 25 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com program registers the 'program registers ? are used for device configuration settings and are typically programmed once on powerup or after device reset. there are different program registers such as ? auto-1 mode programming ? for pre-programming the channel sequence, ? auto-2 mode programming ? for selection of the last channel in the sequence, ? alarm programming ? for all 16 channels (or 12,8,4 channels depending on the device) and gpio for individual pin configuration as gpi or gpo or a pre-assigned function. device power-up sequence the device power-up sequence is shown in figure 49 . manual mode is the default power-up channel sequencing mode and channel-0 is the first channel by default. as explained previously, these devices offer program registers to configure user programmable features like gpio, alarm, and to pre-program the channel sequence for auto modes. at ? powerup or on reset ? these registers are set to the default values listed in table 1 to table 10 . it is recommended to program these registers on powerup or after reset. once configured; the device is ready to use in any of the three channel sequencing modes namely manual, auto-1, and auto-2. 26 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 (1) the device continues its operation in manual mode channel 0 through out the programming sequence and outputs valid conversion results. it is possible to change channel, range, gpio by inserting extra frames in between two programming blocks. it is also possible to bypass any programming block if the user does not intent to use that feature. (2) it is possible to reprogram the device at any time during operation, regardless of what mode the device is in. during programming the device continues its operation in whatever mode it is in and outputs valid data. figure 49. device power-up sequence operating in manual mode the details regarding entering and running in manual channel sequencing mode are illustrated in figure 50 . table 1 lists the mode control register settings for manual mode in detail. note that there are no program registers for manual mode. copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 27 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 device power up or reset device operation in manual mode, channel 0;sdo invalid in first frame cs first frame cs cs cs cs operation in manual mode cs cs cs auto 1 register program (note 1) auto 2 register program (note 1) alarm register program (note 1)gpio register program (note 1) operation in auto 1 mode operation in auto 2 mode
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com figure 50. entering and running in manual channel sequencing mode 28 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 device operation in auto 1 or auto 2 mode change to manual mode? * sample: samples and converts channel selected in frame n-1 * mux : selects channel incremented from previous frame as per auto sequence this channel will be acquired in this frame and sampled at start of frame n+1 * range: as programmed in frame n-1 . applies to channel selected for acquisition in current frame. * sdi : programming for frame n +1 di15..12 = 0001 binary . selects manual mode di11=1 enables programming of range and gpio di10..7 = binary address of channel di6.. as per required range for channel to be selected di5=0 .. no power down di4..0 as per gpio settings *sdo : do15..0 address (or gpio data) & conversion data of channel selected in frame n -1 * gpio : o/p: latched on cs falling edge as per di3..0 written in frame n-1 i/p: input status latched on falling edge of cs and transferred serially on sdo in the same frame no yes cs cs continue operation in manual mode cs frame: n-1 frame: n request for manual mode * sample: samples and converts channel selected in frame n * mux : selects channel programmed in frame n(manual mode) this channel will be acquired in this frame and sampled at start of frame n+2 * range: as programmed in frame n. applies to channel selected for acquisition in current frame.* sdi : programming for frame n+2 di15..12 = 0001 binary . to continue in manual mode di11=1 enables programming of range and gpio di10..7 = binary address of channel di6.. as per required range for channel to be selected di5=0 .. no power down di4..0 as per gpio settings *sdo : do15..0 address (or gpio data) & conversion data of channel selected in frame n * gpio : o/p: latched on cs falling edge as per di3..0 written in frame n i/p: input status latched on falling edge of cs and transferred serially on sdo in the same frame cs frame: n+1 entry into manual mode * sample: samples and converts channel selected in frame n+1 * mux : selects channel programmed in frame n+1 (manual mode), this channel will be acquired in this frame and sampled at start of frame n+3 * range: as programmed in frame n+1 . applies to channel selected for acquisition in current frame.* sdi : programming for frame n+3 di15..12 = 0001 binary . selects manual mode di11=1 enables programming of range and gpio di10..7 = binary address of channel di6.. as per required range for channel to be selected di5=0 .. no power down di4..0 as per gpio settings *sdo : do15..0 address (or gpio data) & conversion data of channel selected in frame n+1 * gpio : o/p: latched on cs falling edge as per di3..0 written in frame n+1 i/p: input status latched on falling edge of cs and transferred serially on sdo in the same frame cs frame: n+2 operation in manual mode
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 table 1. mode control register settings for manual mode description reset bits logic state function state di15-12 0001 0001 selects manual mode di11 0 1 enables programming of bits di06-00. 0 device retains values of di06-00 from the previous frame. di10-07 0000 this four bit data represents the address of the next channel to be selected in the next frame. di10: msb and di07: lsb. e.g. 0000 represents channel- 0, 0001 represents channel-1 etc. di06 0 0 selects 2.5v i/p range (range 1) 1 selects 5v i/p range (range 2) di05 0 0 device normal operation (no powerdown) 1 device powers down on 16th sclk falling edge di04 0 sdo outputs current channel address of the channel on do15..12 followed by 12 bit conversion 0 result on do11..00. 1 gpio3-gpio0 data (both input and output) is mapped onto do15-do12 in the order shown below. lower data bits do11-do00 represent 12-bit conversion result of the current channel. doi5 doi4 doi3 doi2 gpio3 (1) gpio2 (1) gpio1 (1) gpio0 (1) di03-00 0000 gpio data for the channels configured as output. device will ignore the data for the channel which is configured as input. sdi bit and corresponding gpio information is given below di03 di02 di01 di00 gpio3 (2) gpio2 (2) gpio1 (2) gpio0 (2) (1) gpio 1 to 3 are available only in tssop packaged devices. qfn device offers gpio 0 only. (2) gpio 1 to 3 are available only in tssop packaged devices. qfn device offers gpio 0 only. copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 29 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com operating in auto-1 mode the details regarding entering and running in auto-1 channel sequencing mode are illustrated in the flowchart in figure 51 . table 2 lists the mode control register settings for auto-1 mode in detail. figure 51. entering and running in auto-1 channel sequencing mode 30 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 device operation in manual or auto-2 mode change to auto -1 mode? * sample: samples and converts channel selected in frame n -1 * mux : selects channel incremented from previous frame as per auto -2 sequence, or channel programmed in previous frame in case of manual mode. this channel will be acquired in this frame and sampled at start of frame n +1 * range: as programmed in frame n-1 . applies to channel selected for acquisition in current frame. * sdi : programming for frame n+1 di15..12 = 0010 binary . selects auto-1 mode di11=1 enables programming of range and gpio di10 = x, device automatically resets channel to lowest number in auto -1 sequence. di6.. as per required range for channel to be selected di5=0 .. no power down di4..0 as per gpio settings *sdo : do15..0 address (or gpio data) & conversion data of channel selected in frame n -1 * gpio : o/p: latched on cs falling edge as per di 3..0 written in frame n-1 i/p: input status latched on falling edge of cs and transferred serially on sdo in the same frame no yes cs cs continue operation in auto -1 mode cs frame: n-1 frame: n request for auto-1 mode * sample: samples and converts channel selected in frame n * mux : selects lowest channel # in auto-1 sequence; this channel will be acquired in this frame and sampled at start of frame n+2 * range: as programmed in frame n . applies to channel selected for acquisition in current frame. * sdi : programming for frame n +2 di15..12 = 0010 binary . to continue in auto-1 mode di11=1 enables programming of range and gpio di10 =0, not to reset channel sequence di6.. as per required range for channel to be selected di5=0 .. no power down di4..0 as per gpio settings *sdo : do15..0 address (or gpio data) & conversion data of channel selected in frame n * gpio : o/p: latched on cs falling edge as per di 3..0 written in frame n i/p: input status latched on falling edge of cs and transferred serially on sdo in the same frame cs frame: n+1 entry into auto-1 mode * sample: samples and converts channel selected in frame n+1 (ie. lowest channel# in auto-1 sequence) * mux : selects next higher channel in auto -1 sequence, this channel will be acquired in this frame and sampled at start of frame n +3 * range: as programmed in frame n+1 . applies to channel selected for acquisition in current frame.* sdi : programming for frame n+3 di15..12 = 0010 binary . to continue in auto-1 mode di11=1 enables programming of range and gpio di10 =0 not to reset channel sequence di6.. as per required range for channel to be selected di5=0 .. no power down di4..0 as per gpio settings *sdo : do15..0 address (or gpio data) & conversion data of channel selected in frame n+1 * gpio : o/p: latched on cs falling edge as per di3..0 written in frame n+1 i/p: input status latched on falling edge of cs and transferred serially on sdo in the same frame cs frame: n+2 operation in auto-1 mode
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 table 2. mode control register settings for auto-1 mode description reset bits logic state function state di15-12 0001 0010 selects auto-1 mode di11 0 1 enables programming of bits di10-00. 0 device retains values of di10-00 from previous frame. di10 0 1 the channel counter is reset to the lowest programmed channel in the auto-1 program register 0 the channel counter increments every conversion (no reset) di09-07 000 xxx do not care di06 0 0 selects 2.5v i/p range (range 1) 1 selects 5v i/p range (range 2) di05 0 0 device normal operation (no powerdown) 1 device powers down on the 16th sclk falling edge di04 0 sdo outputs current channel address of the channel on do15..12 followed by 12-bit conversion 0 result on do11..00. 1 gpio3-gpio0 data (both input and output) is mapped onto do15-do12 in the order shown below. lower data bits do11-do00 represent 12-bit conversion result of the current channel. do15 do14 do13 do12 gpio3 (1) gpio2 (1) gpio1 (1) gpio0 (1) di03-00 0000 gpio data for the channels configured as output. device will ignore the data for the channel which is configured as input. sdi bit and corresponding gpio information is given below di03 di02 di01 di00 gpio3 (2) gpio2 (2) gpio1 (2) gpio0 (2) (1) gpio 1 to 3 are available only in tssop packaged devices. qfn device offers gpio 0 only. (2) gpio 1 to 3 are available only in tssop packaged devices. qfn device offers gpio 0 only. copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 31 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com the auto-1 program register is programmed (once on powerup or reset) to pre-select the channels for the auto-1 sequence. auto-1 program register programming requires two cs frames for complete programming. in the first cs frame the device enters the auto-1 register programming sequence and in the second frame it programs the auto-1 program register. refer to table 2 , table 3 , and table 4 for complete details. note: the device continues its operation in selected mode during programming. sdo is valid, however it is not possible to change the range or write gpio data into the device during programming. figure 52. auto-1 register programming flowchart table 3. program register settings for auto-1 mode description reset bits state logic state function frame 1 di15-12 na 1000 device enters auto-1 program sequence. device programming is done in the next frame. di11-00 na do not care frame 2 di15-00 all 1s 1 (individual bit) a particular channel is programmed to be selected in the channel scanning sequence. the channel numbers are mapped one-to-one with respect to the sdi bits; e.g. di15 ch15, di14 ch14 ? di00 ch00 a particular channel is programmed to be skipped in the channel scanning sequence. the 0 (individual bit) channel numbers are mapped one-to-one with respect to the sdi bits; e.g. di15 ch15, di14 ch14 ? di00 ch00 table 4. mapping of channels to sdi bits for 16,12,8,4 channel devices device (1) sdi bits di15 di14 di13 di12 di11 di10 di09 di08 di07 di06 di05 di04 di03 di02 di01 di00 16 chan 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 12 chan x x x x 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 8 chan x x x x x x x x 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 4 chan x x x x x x x x x x x x 1/0 1/0 1/0 1/0 (1) when operating in auto-1 mode, the device only scans the channels programmed to be selected. 32 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 device in any operation mode yes no cs cs entry into auto 1 register programming sequence cs auto 1 register programming program auto 1 register? sdi: di15..12 = 1000 (device enters auto 1 programming sequence) sdi: di15..0 as per tables 4,5 end of auto 1 register programming
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 operating in auto-2 mode the details regarding entering and running in auto-2 channel sequencing mode are illustrated in figure 53 . table 5 lists the mode control register settings for auto-2 mode in detail. figure 53. entering and running in auto-2 channel sequencing mode copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 33 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 device operation in manual orauto - 1 mode change to auto - 2 mode ? * sample: samples and converts channel selected in frame n-1 * mux : selects channel incremented from previous frame as per auto-1 sequence, or channel programmed in previous frame in case of manual mode. . this channel will be acquired in this frame and sampled at start of frame n +1 * range: as programmed in frame n-1. applies to channel selected for acquisition in current frame. * sdi : programming for frame n+1 di15..12 = 0011 binary . selects auto-2 mode di11=1 enables programming of range and gpio di10 = x, device automatically resets to channel 0. di6.. as per required range for channel to be selected di5=0 .. no power down di4..0 as per gpio settings *sdo : do15..0 address(or gpio data) & conversion data of channel selected in frame n -1 * gpio : o/p: latched on cs falling edge as per di 3..0 written in frame n -1 i/p: input status latched on falling edge of cs and transferred serially on sdo in the same frame no yes cs cs continue operation in auto-2 mode cs frame: n-1 frame: n request for auto-2 mode * sample: samples and converts channel selected in frame n * mux : selects channel0 (auto-2 sequence always starts with ch -0); this channel will be acquired in this frame and sampled at start of frame n+2 * range: as programmed in frame n. applies to channel selected for acquisition in current frame. * sdi : programming for frame n +2 di15..12 = 0011 binary . to continue in auto -2 mode di11=1 enables programming of range and gpio di10 =0, not to reset channel sequence di6.. as per required range for channel to be selected di5=0 .. no power down di4..0 as per gpio settings *sdo : do15..0 address(or gpio data) & conversion data of channel selected in frame n * gpio : o/p: latched on cs falling edge as per di 3..0 written in frame n i/p: input status latched on falling edge of cs and transferred serially on sdo in the same frame cs frame: n+1 entry into auto-2 mode * sample: samples and converts channel 0 * mux : selects next higher channel in auto -2 sequence, this channel will be acquired in this frame and sampled at start of frame n+3 * range: as programmed in frame n+1. applies to channel selected for acquisition in current frame.* sdi : programming for frame n+3 di15..12 = 0011 binary . to continue in auto -2 mode di11=1 enables programming of range and gpio di10 =0 not to reset channel sequence di6.. as per required range for channel to be selected di5=0 .. no power down di4..0 as per gpio settings *sdo : do15..0 address(or gpio data) & conversion data of channel selected in frame n+1 * gpio : o/p: latched on cs falling edge as per di 3..0 written in frame n+1 i/p: input status latched on falling edge of cs and transferred serially on sdo in the same frame cs frame: n+2 operation in auto-2 mode
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com table 5. mode control register settings for auto-2 mode description reset bits logic state function state di15-12 0001 0011 selects auto-2 mode di11 0 1 enables programming of bits di10-00. 0 device retains values of di10-00 from the previous frame. di10 0 1 channel number is reset to ch-00. 0 channel counter increments every conversion.(no reset). di09-07 000 xxx do not care di06 0 0 selects 2.5v i/p range (range 1) 1 selects 5v i/p range (range 2) di05 0 0 device normal operation (no powerdown) 1 device powers down on the 16th sclk falling edge di04 0 sdo outputs the current channel address of the channel on do15..12 followed by the 12-bit 0 conversion result on do11..00. 1 gpio3-gpio0 data (both input and output) is mapped onto do15-do12 in the order shown below. lower data bits do11-do00 represent the 12-bit conversion result of the current channel. do15 do14 do13 do12 gpio3 (1) gpio2 (1) gpio1 (1) gpio0 (1) di03-00 0000 gpio data for the channels configured as output. device ignores data for the channel which is configured as input. sdi bit and corresponding gpio information is given below di03 di02 di01 di00 gpio3 (1) gpio2 (1) gpio1 (1) gpio0 (1) (1) gpio 1 to 3 are available only in tssop packaged devices. qfn device offers gpio 0 only. the auto-2 program register is programmed (once on powerup or reset) to pre-select the last channel (or sequence depth) in the auto-2 sequence. unlike auto-1 program register programming, auto-2 program register programming requires only 1 cs frame for complete programming. see figure 54 and table 6 for complete details. note: the device continues its operation in the selected mode during programming. sdo is valid, however it is not possible to change the range or write gpio data into the device during programming. figure 54. auto-2 register programming flowchart 34 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 device in any operation mode yes no cs cs auto 2 register programming program auto 2 register? sdi: di15..12 = 1001 di9..6 = binary address of last channel in the sequence refer tables 6 end of auto 2 register programming
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 table 6. program register settings for auto-2 mode description reset bits logic state function state di15-12 na 1001 auto-2 program register is selected for programming di11-10 na do not care di09-06 na aaaa this 4-bit data represents the address of the last channel in the scanning sequence. during device operation in auto-2 mode, the channel counter starts at ch-00 and increments every frame until it equals ? aaaa ? . the channel counter roles over to ch-00 in the next frame. di05-00 na do not care continued operation in a selected mode once a device is programmed to operate in one of the modes, the user may want to continue operating in the same mode. mode control register settings to continue operating in a selected mode are detailed in table 7 . table 7. continued operation in a selected mode description reset bits logic state function state di15-12 0001 0000 the device continues to operate in the selected mode. in auto-1 and auto-2 modes the channel counter increments normally, whereas in the manual mode it continues with the last selected channel. the device ignores data on di11-di00 and continues operating as per the previous settings. this feature is provided so that sdi can be held low when no changes are required in the mode control register settings. di11-00 all '0' device ignores these bits when di15-12 is set to 0000 logic state programming alarm thresholds there are two alarm program registers per channel, one for setting the high alarm threshold and the other for setting the low alarm threshold. for ease of programming, two alarm programming registers per channel, corresponding to four consecutive channels, are assembled into one group (a total eight registers). there are four such groups for 16 channel devices and 3/2/1 such groups for 12/8/4 channel devices respectively. the grouping of the various channels for each device in the ads79xx family is listed in table 8 . the details regarding programming the alarm thresholds are illustrated in the flowchart in figure 55 . table 9 lists the details regarding the alarm program register settings. table 8. grouping of alarm program registers group no. registers applicable for device 0 high and low alarm for channel 0, 1, 2, and 3 ads7953..50, ads7957..54, ads7961..58 1 high and low alarm for channel 4, 5, 6, and 7 ads7953..51, ads7957..55, ads7961..59 2 high and low alarm for channel 8, 9, 10, and 11 ads7953 and 52, ads7957 and 56, ads7961 and 60 3 high and low alarm for channel 12, 13, 14, and 15 ads7953, ads7957, ads7961 each alarm group requires 9 cs frames for programming their respective alarm thresholds. in the first frame the device enters the programming sequence and in each subsequent frame it programs one of the registers from the group. the device offers a feature to program less than eight registers in one programming sequence. the device exits the alarm threshold programming sequence in the next frame after it encounters the first ? exit alarm program ? bit high. copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 35 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com note: the device continues its operation in selected mode during programming. sdo is valid, however it is not possible to change the range or write gpio data into the device during programming. figure 55. alarm program register programming flowchart table 9. alarm program register settings description bits reset state logic function state frame 1 di15-12 na 1100 device enters ? alarm programming sequence ? for group 0 1101 device enters ? alarm programming sequence ? for group 1 1110 device enters ? alarm programming sequence ? for group 2 1111 device enters ? alarm programming sequence ? for group 3 note: di15-12 = 11bb is the alarm programming request for group bb. here ? bb ? represents the alarm programming group number in binary format. di11-14 na do not care frame 2 and onwards 36 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 device in any operation mode program alarm thresholds? program another group of four channels? end of alarm programing yes yes no no no yes cs cs entry into alarm register programming sequence cs alarm register programming sequence sdi: di15..12 = 11xx (xx indicates group of four channels; refer table 8) device enters alarm register programming sequence sdi: di15..0 as per table 8 (program alarm thresholds) di12 = 1?
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 table 9. alarm program register settings (continued) description bits reset state logic function state di15-14 na cc where ? cc ? represents the lower two bits of the channel number in binary format. the device programs the alarm for the channel represented by the binary number ? bbcc ? . note that ? bb ? is programmed in the first frame. di13 na 1 high alarm register selection 0 low alarm register selection di12 na 0 continue alarm programming sequence in next frame 1 exit alarm programming in the next frame. note: if the alarm programming sequence is not terminated using this feature then the device will remain in the alarm programming sequence state and all sdi data will be treated as alarm thresholds. di11-10 na xx do not care di09-00 all ones for high this 10-bit data represents the alarm threshold. the 10-bit alarm threshold is compared with the upper 10-bit alarm register word of the 12-bit conversion result. the device sets off an alarm when the conversion result is higher (high and all zeros for alarm) or lower (low alarm) than this number. for 10-bit devices, all 10 bits of the conversion result are low alarm register compared with the set threshold. for 8-bit devices, all 8 bits of the conversion result are compared with di09 to di02 and di00, 01 are 'do not care'. programming gpio registers note gpio 1 to 3 are available only in tssop packaged devices. the qfn device offers 'gpio 0' only. as a result, all references related to 'gpio 0' only are valid in the case of qfn package devices. the device has four general purpose input and output (gpio) pins. each of the four pins can be independently programmed as general purpose output (gpo) or general purpose input (gpi). it is also possible to use the gpios for some pre-assigned functions (refer to table 10 for details). gpo data can be written into the device through the sdi line. the device refreshes the gpo data on every cs falling edge as per the sdi data written in the previous frame. similarly, the device latches gpi status on the cs falling edge and outputs it on sdo (if gpi is read enabled by writing di04 = 1 during the previous frame) in the same frame starting on the cs falling edge. the details regarding programming the gpio registers are illustrated in the flowchart in figure 56 . table 10 lists the details regarding gpio register programming settings. copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 37 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com note: the device continues its operation in selected mode during programming. sdo is valid, however it is not possible to change the range or write gpio data into the device during programming. figure 56. gpio program register programming flowchart table 10. gpio program register settings description reset bits logic state function state di15-12 na 0100 device selects gpio program registers for programming. di11-10 00 00 do not program these bits to any logic state other than ? 00 ? di09 0 1 device resets all registers in the next cs frame to the reset state shown in the corresponding tables (it also resets itself). 0 device normal operation di08 0 1 device configures gpio3 as the device power-down input. 0 gpio3 remains general purpose i or o. program 0 for qfn packaged devices. di07 0 1 device configures gpio2 as device range input. 0 gpio2 remains general purpose i or o. program 0 for qfn packaged devices. di06-04 000 000 gpio1 and gpio0 remain general purpose i or o. valid setting for qfn packaged devices. xx1 device configures gpio0 as ? high or low ? alarm output. this is an active high output. gpio1 remains general purpose i or o. valid setting for qfn packaged devices. 010 device configures gpio0 as high alarm output. this is an active high output. gpio1 remains general purpose i or o. valid setting for qfn packaged devices. 100 device configures gpio1 as low alarm output. this is an active high output. gpio0 remains general purpose i or o. setting not allowed for qfn packaged devices. 110 device configures gpio1 as low alarm output and gpio0 as a high alarm output. these are active high outputs. setting not allowed for qfn packaged devices. note: the following settings are valid for gpio which are not assigned a specific function through bits di08..04 di03 0 1 gpio3 pin is configured as general purpose output. program 1 for qfn packaged devices. 0 gpio3 pin is configured as general purpose input. setting not allowed for qfn packaged devices. di02 0 1 gpio2 pin is configured as general purpose output. program 1 for qfn packaged devices. 0 gpio2 pin is configured as general purpose input. setting not allowed for qfn packaged devices. di01 0 1 gpio1 pin is configured as general purpose output. program 1 for qfn packaged devices. 0 gpio1 pin is configured as general purpose input. setting not allowed for qfn packaged devices. di00 0 1 gpio0 pin is configured as general purpose output. valid setting for qfn packaged devices. 38 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 device in any operation mode program gpio register? end of gpio register programming yes no cs cs gpio register programming sdi: di15..12 = 0100 refer table 9 for di11..00 data
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 table 10. gpio program register settings (continued) description reset bits logic state function state 0 gpio0 pin is configured as general purpose input. valid setting for qfn packaged devices. copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 39 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com application information analog input the ads79xx device family offers 12/10/8-bit adcss with 16/12/8/4 channel multiplexers for analog input. the multiplexer output is available on the mxo pin. ainp is the adc input pin. the devices offers flexibility for a system designer as both signals are accessible esternally. typically it is convenient to short mxo to the ainp pin so that signal input to each multiplexer channel can be processed independently. in this condition it is recommended to limit source impedance to 50 ? or less. higher source impedance may affect the signal settling time after a multiplexer channel change. this condition can affect linearity and total harmonic distortion. gpio 1 to 3 are available only in tssop packaged devices. qfn device offers 'gpio 0' only. as a result all references related to 'gpio 0' only are valid in case of qfn package devices. figure 57. typical application diagram showing mxo shorted to ainp another option is to add a common adc driver buffer between the mxo and ainp pins. this relaxes the restriction on source impedance to a large extent. refer to the typical characteristics section for the effect of source impedance on device performance. the typical characteristics show that the device has respectable performance with up to 1k ? source impedance. this topology (including a common adc driver) is useful when all channel signals are within the acceptable range of the adc. in this case the user can save on signal conditioning circuit for each channel. 40 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 mxo ainp ch0 chn* ch2 ch1 adc gpio 0, h alarm gpio 1, l alarm sdi gpio 2, rangesclk cs sdo to host ref 10 f m ref5025 o/p from sensors, ina etc. there is a restriction on source impedance. r 50 source w gpio 3, pd
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 gpio 1 to 3 are available only in tssop packaged devices. qfn device offers 'gpio 0' only. as a result all references related to 'gpio 0' only are valid in case of qfn package devices. figure 58. typical application diagram showing common buffer/pga for all channels when the converter samples an input, the voltage difference between ainp and agnd is captured on the internal capacitor array. the (peak) input current through the analog inputs depends upon a number of factors: sample rate, input voltage, and source impedance. the current into the ads79xx charges the internal capacitor array during the sample period. after this capacitance has been fully charged, there is no further input current. when the converter goes into hold mode, the input impedance is greater than 1 g . care must be taken regarding the absolute analog input voltage. to maintain linearity of the converter, the ch0 .. chn and ainp inputs should be within the limits specified. outside of these ranges, converter linearity may not meet specifications. copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 41 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 mxo ainp ch0 chn* ch2 ch1 adc high input impedance pga (or non inverting buffer like ths4031) gpio 1, 2, 3 pga gain control gpio 0 h/l alarm sdisclk cs sdo to host ref 10 f m ref5025 o/p from sensors, ina etc. source impedance has very little effect on performance. refer to typical characteristics for details.
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com figure 59. adc and mux equivalent circuit reference the ads79xx can operate with an external 2.5v 10mv reference. a clean, low noise, well-decoupled reference voltage on the ref pin is required to ensure good performance of the converter. a low noise band-gap reference like the ref5025 can be used to drive this pin. a 10- m f ceramic decoupling capacitor is required between the ref and gnd pins of the converter. the capacitor should be placed as close as possible to the pins of the device. power saving the ads79xx devices offer a power-down feature to save power when not in use. there are two ways to powerdown the device. it can be powered down by writing di05 = 1 in the mode control register (refer to table 1 , table 2 and table 5 ); in this case the device powers down on the 16th falling edge of sclk in the next data frame. another way to powerdown the device is through gpio. gpio3 can act as a pd input (refer to table 10 , for assigning this functionality to gpio3). this is an asynchronous and active low input. the device powers down instantaneously after gpio3 ( pd) = 0. the device will powerup again on the cs falling edge while di05 = 0 in the mode control register and gpio3 ( pd) = 1. digital output as discussed previously in the device operation section, the digital output of the ads79xx devices is spi compatible. the following table lists the output codes corresponding to various analog input voltages. table 11. ideal input voltages and output codes for 12-bit devices (ads7950/51/52/53) description analog value digital output full scale range range 1 v ref range 2 2 v ref straight binary least significant bit (lsb) v ref /4096 2v ref /4096 binary code hex code full scale v ref ? 1 lsb 2v ref ? 1 lsb 1111 1111 1111 fff midscale v ref /2 v ref 1000 0000 0000 800 midscale ? 1 lsb v ref /2 ? 1 lsb v ref ? 1 lsb 0111 1111 1111 7ff zero 0 v 0 v 0000 0000 0000 000 table 12. ideal input voltages and output codes for 10-bit devices (ads7954/55/56/57) description analog value digital output full scale range range 1 v ref range 2 2 v ref straight binary least significant bit (lsb) v ref /1024 2v ref /1024 binary code hex code full scale v ref ? 1 lsb 2v ref ? 1 lsb 11 1111 1111 3ff midscale v ref /2 v ref 10 0000 0000 200 midscale ? 1 lsb v ref /2 ? 1 lsb v ref ? 1 lsb 01 1111 1111 1ff zero 0 v 0 v 00 0000 0000 000 42 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 200 ohm 7 pf 3 pf 20m ohm 3 pf 5 pf 80 ohm ch0 assumed to be on chn assumed to be off ch0 chn mxo ainp w w w
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 table 13. ideal input voltages and output codes for 8-bit devices (ads7958/59/60/61) description analog value digital output full scale range range 1 v ref range 2 2 v ref straight binary least significant bit (lsb) v ref /256 2v ref /256 binary code hex code full scale v ref ? 1 lsb 2v ref ? 1 lsb 1111 1111 ff midscale v ref /2 v ref 1000 0000 80 midscale ? 1 lsb v ref /2 ? 1 lsb v ref ? 1 lsb 0111 1111 7f zero 0 v 0 v 0000 0000 00 copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 43 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 slas605a ? june 2008 ? revised january 2010 www.ti.com revision history changes from original (june 2008) to revision a page ? added qfn information to features ..................................................................................................................................... 1 ? added qfn information to description ................................................................................................................................. 1 ? added qfn information to 12-bit ordering information ......................................................................................................... 3 ? added qfn information to 10-bit ordering information ......................................................................................................... 3 ? added qfn information to 8-bit ordering information ........................................................................................................... 4 ? changed thermal impedance for dbt package in absolute maximum ratings .................................................................... 4 ? changed thermal impedance for rhb package in absolute maximum ratings .................................................................... 4 ? changed thermal impedance for rge package in absolute maximum ratings .................................................................... 4 ? added v ref = 2.5 v 0.1 v to electrical characteristics, ads7950/51/52/53 ..................................................... 5 ? added while 2vref +va to full-scale input span range 2 test conditions ........................................................................... 5 ? added while 2vref +va to full-scale input span range 2 test conditions ........................................................................... 5 ? added total unadjusted error (tue) specification ................................................................................................................ 5 ? changed reference voltage at refp min and max values .................................................................................................. 6 ? added v ref = 2.5 v 0.1 v to electrical characteristics, ads7950/51/52/53 ..................................................... 6 ? added note to electrical characteristics, ads7950/51/52/53 ............................................................................ 6 ? added v ref = 2.5 v 0.1 v to electrical characteristics, ads7954/55/56/57 test conditions ............................. 6 ? added while 2vref +va to full-scale input span range 2 test conditions ........................................................................... 6 ? added while 2vref +va to full-scale input span range 2 test conditions ........................................................................... 6 ? added v ref = 2.5 v 0.1 v to electrical characteristics, ads7954/55/56/57 test conditions ............................. 7 ? changed v ref reference voltage at refp min value from 2.49 v to 2.0 v ........................................................................... 7 ? changed v ref reference voltage at refp max value from 2.51 v to 3.0 v .......................................................................... 7 ? added v ref = 2.5 v 0.1 v to electrical characteristics, ads7954/55/56/57 test conditions ............................. 8 ? added v ref = 2.5 v 0.1 v to electrical characteristics, ads7958/59/60/61 test conditions ............................. 8 ? added while 2vref +va to full-scale input span range 2 test conditions ........................................................................... 8 ? added while 2vref +va to full-scale input span range 2 test conditions ........................................................................... 8 ? changed v ref reference voltage at refp min value from 2.49 v to 2.0 v ........................................................................... 9 ? changed v ref reference voltage at refp max value from 2.51 v to 3.0 v .......................................................................... 9 ? added v ref = 2.5 v 0.1 v to electrical characteristics, ads7958/59/60/61 test conditions ............................. 9 ? changed t su1 values from max to min ................................................................................................................................. 10 ? changed t su2 values from max to min ................................................................................................................................. 10 ? changed vee to agnd and vcc to +va on 38-pin tssop pinout ................................................................................. 11 ? added qfn pinout .............................................................................................................................................................. 11 ? added qfn pinout .............................................................................................................................................................. 12 ? added qfn pinout .............................................................................................................................................................. 12 ? added qfn pinout .............................................................................................................................................................. 12 ? added terminal functions for qfn packages ...................................................................................................................... 14 ? changed ads7950/4/8 qfn package mxo pin from 7 to 3 .............................................................................................. 14 ? added total unadjusted error (tue max) graph ................................................................................................. 21 ? added total unadjusted error (tue min) graph .................................................................................................. 21 ? changed gpio pins description ......................................................................................................................................... 23 ? added device powerdown through gpio in the case of the tssop packaged devices ................................................... 25 ? added note to table 1 ........................................................................................................................................................ 29 ? added note to table 1 ........................................................................................................................................................ 29 44 submit documentation feedback copyright ? 2008 ? 2010, texas instruments incorporated product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961 www.ti.com slas605a ? june 2008 ? revised january 2010 ? added note to table 2 ........................................................................................................................................................ 31 ? added note to table 2 ........................................................................................................................................................ 31 ? added note to table 5 ........................................................................................................................................................ 34 ? changed di12 = 1? from no or no to yes or no in figure 55 ........................................................................................... 36 ? added note to programming gpio registers description .................................................................................................. 37 ? added qfn information to table 10 ................................................................................................................................... 38 ? added note to figure 57 ..................................................................................................................................................... 40 ? added note to figure 58 ..................................................................................................................................................... 41 copyright ? 2008 ? 2010, texas instruments incorporated submit documentation feedback 45 product folder link(s): ads7950, ads7951, ads7952, ads7953 ads7954, ads7955, ads7956, ads7957 ads7958, ads7959, ads7960, ads7961
package option addendum www.ti.com 24-jan-2013 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) op temp (c) top-side markings (4) samples ads7950sbdbt active tssop dbt 30 60 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7950 b ads7950sbdbtg4 active tssop dbt 30 60 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7950 b ads7950sbdbtr active tssop dbt 30 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7950 b ads7950sbdbtrg4 active tssop dbt 30 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7950 b ads7950sbrger active vqfn rge 24 3000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7950 b ads7950sbrget active vqfn rge 24 250 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7950 b ads7950sdbt active tssop dbt 30 60 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7950 ads7950sdbtg4 active tssop dbt 30 60 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7950 ads7950sdbtr active tssop dbt 30 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7950 ads7950sdbtrg4 active tssop dbt 30 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7950 ads7950srger active vqfn rge 24 3000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7950 ads7950srget active vqfn rge 24 250 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7950 ads7951sbdbt active tssop dbt 30 60 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7951 b ads7951sbdbtg4 active tssop dbt 30 60 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7951 b ads7951sbdbtr active tssop dbt 30 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7951 b ads7951sbdbtrg4 active tssop dbt 30 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7951 b
package option addendum www.ti.com 24-jan-2013 addendum-page 2 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) op temp (c) top-side markings (4) samples ADS7951SBRGER active vqfn rge 24 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads 7951 b ads7951sbrget active vqfn rge 24 250 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads 7951 b ads7951sdbt active tssop dbt 30 60 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7951 ads7951sdbtg4 active tssop dbt 30 60 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7951 ads7951sdbtr active tssop dbt 30 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7951 ads7951sdbtrg4 active tssop dbt 30 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7951 ads7951srger active vqfn rge 24 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads 7951 ads7951srget active vqfn rge 24 250 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads 7951 ads7952sbdbt active tssop dbt 38 50 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7952 b ads7952sbdbtg4 active tssop dbt 38 50 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7952 b ads7952sbdbtr active tssop dbt 38 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7952 b ads7952sbdbtrg4 active tssop dbt 38 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7952 b ads7952sbrhbr active qfn rhb 32 3000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7952 b ads7952sbrhbt active qfn rhb 32 250 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7952 b ads7952sdbt active tssop dbt 38 50 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7952 ads7952sdbtg4 active tssop dbt 38 50 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7952
package option addendum www.ti.com 24-jan-2013 addendum-page 3 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) op temp (c) top-side markings (4) samples ads7952sdbtr active tssop dbt 38 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7952 ads7952sdbtrg4 active tssop dbt 38 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7952 ads7952srhbr active qfn rhb 32 3000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7952 ads7952srhbt active qfn rhb 32 250 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7952 ads7953sbdbt active tssop dbt 38 50 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7953 b ads7953sbdbtg4 active tssop dbt 38 50 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7953 b ads7953sbdbtr active tssop dbt 38 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7953 b ads7953sbdbtrg4 active tssop dbt 38 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7953 b ads7953sbrhbr active qfn rhb 32 3000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7953 b ads7953sbrhbt active qfn rhb 32 250 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7953 b ads7953sdbt active tssop dbt 38 50 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7953 ads7953sdbtg4 active tssop dbt 38 50 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7953 ads7953sdbtr active tssop dbt 38 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7953 ads7953sdbtrg4 active tssop dbt 38 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7953 ads7953srhbr active qfn rhb 32 3000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7953 ads7953srhbt active qfn rhb 32 250 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7953 ads7954sdbt active tssop dbt 30 60 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7954
package option addendum www.ti.com 24-jan-2013 addendum-page 4 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) op temp (c) top-side markings (4) samples ads7954sdbtg4 active tssop dbt 30 60 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7954 ads7954sdbtr active tssop dbt 30 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7954 ads7954sdbtrg4 active tssop dbt 30 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7954 ads7954srger active vqfn rge 24 3000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7954 ads7954srget active vqfn rge 24 250 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7954 ads7955sdbt active tssop dbt 30 60 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7955 ads7955sdbtg4 active tssop dbt 30 60 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7955 ads7955sdbtr active tssop dbt 30 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7955 ads7955sdbtrg4 active tssop dbt 30 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7955 ads7955srger active vqfn rge 24 3000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7955 ads7955srget active vqfn rge 24 250 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7955 ads7956sdbt active tssop dbt 38 50 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7956 ads7956sdbtg4 active tssop dbt 38 50 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7956 ads7956sdbtr active tssop dbt 38 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7956 ads7956sdbtrg4 active tssop dbt 38 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7956 ads7956srhbr active qfn rhb 32 3000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7956 ads7956srhbt active qfn rhb 32 250 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7956 ads7957sdbt active tssop dbt 38 50 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7957
package option addendum www.ti.com 24-jan-2013 addendum-page 5 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) op temp (c) top-side markings (4) samples ads7957sdbtg4 active tssop dbt 38 50 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7957 ads7957sdbtr active tssop dbt 38 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7957 ads7957sdbtrg4 active tssop dbt 38 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7957 ads7957srhbr active qfn rhb 32 3000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7957 ads7957srhbt active qfn rhb 32 250 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7957 ads7958sdbt active tssop dbt 30 60 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7958 ads7958sdbtg4 active tssop dbt 30 60 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7958 ads7958sdbtr active tssop dbt 30 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7958 ads7958sdbtrg4 active tssop dbt 30 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7958 ads7958srger active vqfn rge 24 3000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7958 ads7958srget active vqfn rge 24 250 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7958 ads7959sdbt active tssop dbt 30 60 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7959 ads7959sdbtg4 active tssop dbt 30 60 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7959 ads7959sdbtr active tssop dbt 30 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7959 ads7959sdbtrg4 active tssop dbt 30 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7959 ads7959srger active vqfn rge 24 3000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7959 ads7959srget active vqfn rge 24 250 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7959 ads7960sdbt active tssop dbt 38 50 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7960
package option addendum www.ti.com 24-jan-2013 addendum-page 6 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) op temp (c) top-side markings (4) samples ads7960sdbtg4 active tssop dbt 38 50 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7960 ads7960sdbtr active tssop dbt 38 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7960 ads7960sdbtrg4 active tssop dbt 38 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7960 ads7960srhbr active qfn rhb 32 3000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7960 ads7960srhbt active qfn rhb 32 250 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7960 ads7961sdbt active tssop dbt 38 50 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7961 ads7961sdbtg4 active tssop dbt 38 50 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7961 ads7961sdbtr active tssop dbt 38 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7961 ads7961sdbtrg4 active tssop dbt 38 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 ads7961 ads7961srhbr active qfn rhb 32 3000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7961 ads7961srhbt active qfn rhb 32 250 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 ads 7961 (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above.
package option addendum www.ti.com 24-jan-2013 addendum-page 7 green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) only one of markings shown within the brackets will appear on the physical device. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. other qualified versions of ads7955 : ? automotive: ads7955-q1 note: qualified version definitions: ? automotive - q100 devices qualified for high-reliability automotive applications targeting zero defects
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant ads7950sbdbtr tssop dbt 30 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 q1 ads7950sbrger vqfn rge 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 ads7950sbrget vqfn rge 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 ads7950sdbtr tssop dbt 30 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 q1 ads7950srger vqfn rge 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 ads7950srget vqfn rge 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 ads7951sbdbtr tssop dbt 30 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 q1 ADS7951SBRGER vqfn rge 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 ads7951sbrget vqfn rge 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 ads7951sdbtr tssop dbt 30 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 q1 ads7951srger vqfn rge 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 ads7951srget vqfn rge 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 ads7952sbdbtr tssop dbt 38 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 q1 ads7952sbrhbr qfn rhb 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 q2 ads7952sbrhbt qfn rhb 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 q2 ads7952sdbtr tssop dbt 38 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 q1 ads7952srhbr qfn rhb 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 q2 ads7952srhbt qfn rhb 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 q2 package materials information www.ti.com 26-jan-2013 pack materials-page 1
device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant ads7953sbdbtr tssop dbt 38 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 q1 ads7953sbrhbr qfn rhb 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 q2 ads7953sbrhbt qfn rhb 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 q2 ads7953sdbtr tssop dbt 38 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 q1 ads7953srhbr qfn rhb 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 q2 ads7953srhbt qfn rhb 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 q2 ads7954sdbtr tssop dbt 30 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 q1 ads7954srger vqfn rge 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 ads7954srget vqfn rge 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 ads7955sdbtr tssop dbt 30 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 q1 ads7955srger vqfn rge 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 ads7955srget vqfn rge 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 ads7956sdbtr tssop dbt 38 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 q1 ads7957sdbtr tssop dbt 38 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 q1 ads7958sdbtr tssop dbt 30 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 q1 ads7958srger vqfn rge 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 ads7958srget vqfn rge 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 ads7959sdbtr tssop dbt 30 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 q1 ads7959srger vqfn rge 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 ads7959srget vqfn rge 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 ads7960sdbtr tssop dbt 38 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 q1 ads7961sdbtr tssop dbt 38 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 q1 package materials information www.ti.com 26-jan-2013 pack materials-page 2
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) ads7950sbdbtr tssop dbt 30 2000 367.0 367.0 38.0 ads7950sbrger vqfn rge 24 3000 367.0 367.0 35.0 ads7950sbrget vqfn rge 24 250 210.0 185.0 35.0 ads7950sdbtr tssop dbt 30 2000 367.0 367.0 38.0 ads7950srger vqfn rge 24 3000 367.0 367.0 35.0 ads7950srget vqfn rge 24 250 210.0 185.0 35.0 ads7951sbdbtr tssop dbt 30 2000 367.0 367.0 38.0 ADS7951SBRGER vqfn rge 24 3000 367.0 367.0 35.0 ads7951sbrget vqfn rge 24 250 210.0 185.0 35.0 ads7951sdbtr tssop dbt 30 2000 367.0 367.0 38.0 ads7951srger vqfn rge 24 3000 367.0 367.0 35.0 ads7951srget vqfn rge 24 250 210.0 185.0 35.0 ads7952sbdbtr tssop dbt 38 2000 367.0 367.0 38.0 ads7952sbrhbr qfn rhb 32 3000 367.0 367.0 35.0 ads7952sbrhbt qfn rhb 32 250 210.0 185.0 35.0 ads7952sdbtr tssop dbt 38 2000 367.0 367.0 38.0 ads7952srhbr qfn rhb 32 3000 367.0 367.0 35.0 ads7952srhbt qfn rhb 32 250 210.0 185.0 35.0 ads7953sbdbtr tssop dbt 38 2000 367.0 367.0 38.0 ads7953sbrhbr qfn rhb 32 3000 367.0 367.0 35.0 package materials information www.ti.com 26-jan-2013 pack materials-page 3
device package type package drawing pins spq length (mm) width (mm) height (mm) ads7953sbrhbt qfn rhb 32 250 210.0 185.0 35.0 ads7953sdbtr tssop dbt 38 2000 367.0 367.0 38.0 ads7953srhbr qfn rhb 32 3000 367.0 367.0 35.0 ads7953srhbt qfn rhb 32 250 210.0 185.0 35.0 ads7954sdbtr tssop dbt 30 2000 367.0 367.0 38.0 ads7954srger vqfn rge 24 3000 367.0 367.0 35.0 ads7954srget vqfn rge 24 250 210.0 185.0 35.0 ads7955sdbtr tssop dbt 30 2000 367.0 367.0 38.0 ads7955srger vqfn rge 24 3000 367.0 367.0 35.0 ads7955srget vqfn rge 24 250 210.0 185.0 35.0 ads7956sdbtr tssop dbt 38 2000 367.0 367.0 38.0 ads7957sdbtr tssop dbt 38 2000 367.0 367.0 38.0 ads7958sdbtr tssop dbt 30 2000 367.0 367.0 38.0 ads7958srger vqfn rge 24 3000 367.0 367.0 35.0 ads7958srget vqfn rge 24 250 210.0 185.0 35.0 ads7959sdbtr tssop dbt 30 2000 367.0 367.0 38.0 ads7959srger vqfn rge 24 3000 367.0 367.0 35.0 ads7959srget vqfn rge 24 250 210.0 185.0 35.0 ads7960sdbtr tssop dbt 38 2000 367.0 367.0 38.0 ads7961sdbtr tssop dbt 38 2000 367.0 367.0 38.0 package materials information www.ti.com 26-jan-2013 pack materials-page 4

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